Design and simulation of frequency divider circuit based on multisim
نویسندگان
چکیده
Frequency divider circuit is the basic in digital logic circuit. The function to divide or drop frequency of high signal get lower for a given by division. On Multisim software platform, using different design methods, as foundation middle scale integration chip 74LS161, even divider, odd and (N- 0.5) respectively. Each principle method illustrated simulated. results showed that correct conform proposed requirement. Experimental teaching applications based on can improve efficiency reduce development time systems.
منابع مشابه
simulation and design of electronic processing circuit for restaurants e-procurement system
the poor orientation of the restaurants toward the information technology has yet many unsolved issues in regards to the customers. one of these problems which lead the appeal list of later, and have a negative impact on the prestige of the restaurant is the case when the later does not respond on time to the customers’ needs, and which causes their dissatisfaction. this issue is really sensiti...
15 صفحه اولDesign and Simulation of Programmable Divider Circuit For PLL Based Frequency Synthesizer
In this paper, the divider circuit for PLL based Frequency Synthesizer has been designed. In the divider circuit, three types of counters have been used namely Prescaler, Main Counter and Swallow Counter. The Divider circuit is a two modulus Divider and it can be used to divide by any value in the range 4635 to 4650 as per the requirement. It uses a two modulus Prescaler and it has two modes of...
متن کاملDesign of Dynamic Frequency Divider using Negative Differential Resistance Circuit
The behavior of two frequency divider circuits using negative differential resistance (NDR) circuit is studied. This NDR circuit is made of three resistors (R) and two bipolar-junction-transistor (BJT) devices. It can show the NDR characteristic in its current-voltage curve by suitably designing the resistances. We discuss a dynamic frequency divider, which is made of a R-BJT-NDR circuit, an in...
متن کاملDesign and Simulation of a Modified 32-bit ROM-based Direct Digital Frequency Synthesizer on FPGA
This paper presents a modified 32-bit ROM-based Direct Digital Frequency Synthesizer (DDFS). Maximum output frequency of the DDFS is limited by the structure of the accumulator used in the DDFS architecture. The hierarchical pipeline accumulator (HPA) presented in this paper has less propagation delay time rather than the conventional structures. Therefore, it results in both higher maximum ope...
متن کاملDesign of High Frequency Cmos Fractional-n Frequency Divider
This paper discussed the circuit level design and simulation of fractional-N frequency divider, a circuit block used mainly in frequency synthesizer. The design was done in schematic level. A low power 0.5 micron CMOS technology called CMOSIS5 used for modeling the circuit devices. The frequency divider was design for 900 MHz GSM standard mobile communication application. For the simulation, ci...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: E3S web of conferences
سال: 2021
ISSN: ['2555-0403', '2267-1242']
DOI: https://doi.org/10.1051/e3sconf/202126801058